IBMs Cognitive Computing Chips - designed to emulate the brain’s abilities for perception, action and cognition

Computing has been essentially the same for over sixty years. An input signal is processed by a device, a switch, an amplifier, a logic gate etc, and then passed onto another device where it is processed again eventually producing some kind of output which could be a flashing light or the information you are reading now. Of course things have moved on from the early days where replacing burned out vacuum tubes was a major task, but despite advances in power and speed driven by better control over device and material parameters, the basic Von Neumann architecture has remained essentially the same. Of course nature has invented far better ways of doing things, the human brain stands at the pinnacle of evolutionary information architecture engineering, and DNA stores information at a higher density and with greater persistence than anything ever invented – we can see bits of our genetic code reaching back almost to the first life, whereas I bet the collection of DVDs in my living room will be as unreadable as video tapes or floppy disks within ten years.

So the development of technology has to take two tracks. While huge effort goes into making things better, faster, cheaper (or at least maintaining decent margins), and in the semiconductor industry if you don’t keep up with your rivals you are finished pretty quickly, there is always the search for new and disruptive paradigms. But that is tough when you are running on the hamster wheel just trying to maintain position, and as many companies found with their nanotechnology efforts, anything unrelated to shipping silicon out of the door tends to be frowned on by management and shareholders more concerned with the quarterly numbers.

IBMs announcement of the first working cognitive computing chips covered nicely by Dean Takahashi at Venturebeat  is one of those potentially disruptive technologies, but don’t expect the next iPad to be powered  by one. While nanotechnologies have given us the tools to at least partially understand how nature works, replicating it is a different matter. It is a very different architecture, and one where connections are far more important than raw speed. But every advance in materials science, nanotechnology, and neuroscience takes us a step closer to developing something that allows us to get off the treadmill of Moore’s Law.
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Singularians may be disappointed to find that they won’t be able to download their brain onto a chip anytime in the near future. What this work shows us is that we can replicate some of the functions of the brain, the ones that we understand, but there are many others that we cannot. Moving to organic materials where gigahertz speeds are unobtainable but fabrication is cheap may move things forward, helping to realise the long cherished idea of distributed intelligence or the Internet of Things.

And getting off the treadmill is the key to innovation. It’s something that governments and large corporations just don’t get. Companies are often too focused on improving shipping products to look at anything else, and governments fundamentally misunderstand how innovation works,which ties them to the old linear Von Neumann architecture. As a result innovation often comes from an unexpected source, as many mobile phone found to their cost, and five years on many are still scrambling to replicate the iPhone.
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Part of IBM’s success has been due to the excursions into nanotech, cognition and many other seemingly unrelated areas which over time have enabled new technologies while generating substantial licensing revenues. Yes blue sky research is a luxury, but if your nose is too close to the grindstone how many opportunities will you miss?
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The von Neumann Architecture of Computer Systems

Any discussion of computer architectures, of how computers and computer systems are organized, designed, and implemented, inevitably makes reference to the "von Neumann architecture" as a basis for comparison. And of course this is so, since virtually every electronic computer ever built has been rooted in this architecture. The name applied to it comes from John von Neumann, who as author of two papers in 1945 [Goldstine and von Neumann 1963, von Neumann 1981] and coauthor of a third paper in 1946 [Burks, et al. 1963] was the first to spell out the requirements for a general purpose electronic computer. The 1946 paper, written with Arthur W. Burks and Hermann H. Goldstine, was titled "Preliminary Discussion of the Logical Design of an Electronic Computing Instrument," and the ideas in it were to have a profound impact on the subsequent development of such machines.

Von Neumann's design led eventually to the construction of the EDVAC computer in 1952. However, the first computer of this type to be actually constructed and operated was the Manchester Mark I, designed and built at Manchester University in England [Siewiorek, et al. 1982]. It ran its first program in 1948, executing it out of its 96 word memory. It executed an instruction in 1.2 milliseconds, which must have seemed phenomenal at the time. Using today's popular "MIPS" terminology (millions of instructions per second), it would be rated at .00083 MIPS. By contrast, some current supercomputers are rated at in excess of 1000 MIPS. And yet, these computers, such as the Cray systems and the Control Data Cyber 200 models, are still tied to the von Neumann architecture to a large extent.

Over the years, a number of computers have been claimed to be "non-von Neumann," and many have been at least partially so. More and more emphasis is being put on the necessity for breaking away from this traditional architecture in order to achieve more usable and more productive systems. The expectations for the fifth generation systems seem to require that substantially new architectures be evolved, and that both hardware and software be freed from the limitations of the von Neumann architecture [Sharp 1985].
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We all know what the von Neumann architecture is, of course. At least we have strong intuitive feelings about it because this is what we have always used. This is "the way computers work." But to really comprehend what choices there are for computer designers, to appreciate what new choices must be found, it is necessary to have a more definitive understanding of what the von Neumann architecture is and is not and what its implications are.

Von Neumann begins his "Preliminary Discussion" with a broad description of the general-purpose computing machine containing four main "organs." These are identified as relating to arithmetic, memory, control, and connection with the human operator. In other words, the arithmetic logic unit, the control unit, the memory, and the input-output devices that we see in the classical model of what a computer "looks like."

To von Neumann, the key to building a general purpose device was in its ability to store not only its data and the intermediate results of computation, but also to store the instructions, or orders, that brought about the computation. In a special purpose machine the computational procedure could be part of the hardware. In a general purpose one the instructions must be as changeable as the numbers they acted upon. Therefore, why not encode the instructions into numeric form and store instructions and data in the same memory? This frequently is viewed as the principal contribution provided by von Neumann's insight into the nature of what a computer should be.

He then defined the control organ as that which would automatically execute the coded instructions stored in memory. Interestingly he says that the orders and data can reside in the same memory "if the machine can in some fashion distinguish a number from an order" [Burks, et al., p. 35].
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And yet, there is no distinction between the two in memory. The control counter (what we now usually call the program counter) contains the address of the next instruction, and that word is fetched to be executed. Whatever the control unit "believes" to be an order or to be data is treated as such. One ramification of this is that the instructions can operate upon other instructions, producing a self-modifying program. This has not been considered good form for many years, because of the implications for program debugging and the desire for reentrant code in some situations. It is possible that new developments in artificial intelligence may bring fresh attention to the possibilites afforded by this characteristic [Bishop 1986].

Von Neumann devoted most of his "Preliminary Discussion" to the design of the arithmetic unit. The details of this are the least interesting part of the paper from the standpoint of the organization of his computer, and its influence on future developments. The capabilities of the arithmetic unit were limited to the performance of some arbitrary subset of the possible arithmetic operations. He observes that "the inner economy of the arithmetic unit is determined by a compromise between the desire for speed of operation...and the desire for simplicity, or cheapness, of the machine" [Burks, et al., p. 36]. What is interesting, and important, is that this issue continued to dominate design decisions for many years. It is less true now that hardware costs have become a substantially less critical concern.

The concepts put forth by von Neumann were, for their time, quite remarkable--so much so that they provided the foundations for all of the early computers developed, and for the most part are still with us today. Why then do we require something different? What is it about this architecture that we find constraining and counterproductive? Why must there be new, different, "non-von Neumann" machines?
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Myers [1982] defines four properties that characterize the von Neumann architecture, all of which he feels are antithetical to today's needs. One of these was discussed above, that is the fact that instructions and data are distinguished only implicitly through usage. As he points out, the higher level languages currently used for programming make a clear distinction between the instructions and the data and have no provision for executing data or using instructions as data.

A second property is that the memory is a single memory, sequentially addressed. A third, which is really a consequence of the previous property, is that the memory is one-dimensional. Again, these are in conflict with our programming languages. Most of the resulting program, therefore, is generated to provide for the mapping of multidimensional data onto the one dimensioned memory and to contend with the placement of all of the data into the same memory.

Finally, the fourth property is that the meaning of the data is not stored with it. In other words, it is not possible to tell by looking at a set of bits whether that set of bits represents an integer, a floating point number or a character string. In a higher level language, we associate such a meaning with the data, and expect a generic operation to take on a meaning determined by the meaning of its operands.

In characterizing the difficulties presented by these four properties, their inconsistencies with higher level languages are emphasized. And yet, these higher level languages were, for the most part, designed to be utilized for the purpose of programming the existing von Neumann style computers. In a very real sense, the entire realm of software has been developed under the umbrella of this architecture and may be aptly referred to as von Neumann software. Thus, the hardware and software have served to perpetuate each other according to the underlying von Neumann model.
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One facet of this is the fundamental view of memory as a "word at a time" kind of device. A word is transferred from memory to the CPU or from the CPU to memory. All of the data, the names (locations) of the data, the operations to be performed on the data, must travel between memory and CPU a word at a time. Backus [1978] calls this the "von Neumann bottleneck." As he points out, this bottleneck is not only a physical limitation, but has served also as an "intellectual bottleneck" in limiting the way we think about computation and how to program it.

Obviously, the computers we use today are not simply larger, faster EDVACs. Numerous improvements have been made through the introduction of, for example: index registers and general purpose registers; floating point data representation; indirect addressing; hardware interrupts to redirect program execution upon detection of certain events; input and output in parallel with CPU execution; virtual memory; and the use of multiple processors [Myers 1982]. It is significant that each of these made some improvement over the original model, some of them quite significant improvements, but none fundamentally changed the architecture. In other words, the four properties discussed above still hold, and the von Neumann bottleneck still exists with or without these improvements. It is also significant to note that all of these improvements were implemented before 1960!

Some other improvements can be noted that really have no effect on the architecture at all. For example, cache memory provides a way of making block transfers (still a word at a time) into a smaller, faster memory device. It is an improvement in the implementation, not in the architecture. A similar view holds for the use of multiple memory modules, with parallel transfers from more than one module. All this does is effectively increase the word length, while still functioning in a word at a time mode [Stone 1987]. Again, many such improvements were originally implemented during the 1950s and 1960s.

So what would characterize a "non-von Neumann" machine? Some examples will illustrate.

One is what Myers calls "self-identifying data," or what McKeeman [1967] calls "typed storage." In the von Neumann computer, the instructions themselves must determine whether a set of bits is operated upon as an integer, real, character, or other data type. With typed storage, each operand carries with it in memory some bits to identify its type. Then the computer needs only one ADD operation, for example, (which is all we see in a higher level language), and the hardware determines whether to perform an integer add, floating point add, double precision, complex, or whatever it might be. More expensive hardware, to be sure, but greatly simplified (and shorter) programs. McKeeman first proposed such "language directed" design in 1961. Some computers have taken steps in this direction of high-level language architecture, becoming "slightly" non-von Neumann.
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Another approach aims at avoiding the von Neumann bottleneck by the use of programs that operate on structures or conceptual units rather than on words. Functions are defined without naming any data, then these functions are combined to produce a program. Such a functional approach began with LISP (1961), but had to be forced into a conventional hardware-software environment. New functional programming architectures may be developed from the ground up [Backus 1978, Eisenbach 1987].

A third proposal aims at replacing the notion of defining computation in terms of a sequence of discrete operations [Sharp 1985]. This model, deeply rooted in the von Neumann tradition, sees a program in terms of an orderly execution of instructions as set forth by the program. The programmer defines the order in which operations will take place, and the program counter follows this order as the control executes the instructions. This "control flow" approach would be replaced by a "data flow" model in which the operations are executed in an order resulting only from the interdependencies of the data. This is a newer idea, dating only from the early 1970s.

Our appetite for computing power is insatiable. Standing on the threshold of the fifth generation, we clearly expect more from future computers than just more speed. We have come this far on the basis of enhancements to the existing architectures and their implementation. The use of smaller, cheaper, and faster components is coupled with greater and greater parallelism. The most difficult task connected with adopting new architectures is that it is hard to think about them using our von Neumann oriented minds.
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Two final points should be made. The first is a reiteration of what was said earlier: that it is no less to von Neumann's credit that we now find his design inadequate. The persistence of this architecture may be taken as ample testimony to that. Second, it is no less to von Neumann's credit that such credit must fairly be shared with some other pioneers. In particular, Arthur Burks, J. Presper Eckert, Hermann Goldstine, and John Mauchly, along with numerous others, contributed to the creation of the first general purpose, stored program, electronic digital computer. Von Neumann received the principal credit because he took the time to document the ideas, to elaborate the concepts, to instruct the rest of the world about them. He also received credit because the substance of his reputation gave the greater weight to his words. That seems fair enough.

IBM Unveils Cognitive Computing Chips

ARMONK, N.Y., - 18 Aug 2011: Today, IBM (NYSE: IBM) researchers unveiled a new generation of experimental computer chips designed to emulate the brain’s abilities for perception, action and cognition. The technology could yield many orders of magnitude less power consumption and space than used in today’s computers.

In a sharp departure from traditional concepts in designing and building computers, IBM’s first neurosynaptic computing chips recreate the phenomena between spiking neurons and synapses in biological systems, such as the brain, through advanced algorithms and silicon circuitry. Its first two prototype chips have already been fabricated and are currently undergoing testing.

Called cognitive computers, systems built with these chips won’t be programmed the same way traditional computers are today. Rather, cognitive computers are expected to learn through experiences, find correlations, create hypotheses, and remember – and learn from – the outcomes, mimicking the brains structural and synaptic plasticity.

To do this, IBM is combining principles from nanoscience, neuroscience and supercomputing as part of a multi-year cognitive computing initiative. The company and its university collaborators also announced they have been awarded approximately $21 million in new funding from the Defense Advanced Research Projects Agency (DARPA) for Phase 2 of the Systems of Neuromorphic Adaptive Plastic Scalable Electronics (SyNAPSE) project.

The goal of SyNAPSE is to create a system that not only analyzes complex information from multiple sensory modalities at once, but also dynamically rewires itself as it interacts with its environment – all while rivaling the brain’s compact size and low power usage. The IBM team has already successfully completed Phases 0 and 1.

“This is a major initiative to move beyond the von Neumann paradigm that has been ruling computer architecture for more than half a century,” said Dharmendra Modha, project leader for IBM Research. “Future applications of computing will increasingly demand functionality that is not efficiently delivered by the traditional architecture. These chips are another significant step in the evolution of computers from calculators to learning systems, signaling the beginning of a new generation of computers and their applications in business, science and government.”

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Neurosynaptic Chips

While they contain no biological elements, IBM’s first cognitive computing prototype chips use digital silicon circuits inspired by neurobiology to make up what is referred to as a “neurosynaptic core” with integrated memory (replicated synapses), computation (replicated neurons) and communication (replicated axons).

IBM has two working prototype designs. Both cores were fabricated in 45 nm SOI-CMOS and contain 256 neurons. One core contains 262,144 programmable synapses and the other contains 65,536 learning synapses. The IBM team has successfully demonstrated simple applications like navigation, machine vision, pattern recognition, associative memory and classification.

IBM’s overarching cognitive computing architecture is an on-chip network of light-weight cores, creating a single integrated system of hardware and software. This architecture represents a critical shift away from traditional von Neumann computing to a potentially more power-efficient architecture that has no set programming, integrates memory with processor, and mimics the brain’s event-driven, distributed and parallel processing.

IBM’s long-term goal is to build a chip system with ten billion neurons and hundred trillion synapses, while consuming merely one kilowatt of power and occupying less than two liters of volume.

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Why Cognitive Computing

Future chips will be able to ingest information from complex, real-world environments through multiple sensory modes and act through multiple motor modes in a coordinated, context-dependent manner.

For example, a cognitive computing system monitoring the world's water supply could contain a network of sensors and actuators that constantly record and report metrics such as temperature, pressure, wave height, acoustics and ocean tide, and issue tsunami warnings based on its decision making. Similarly, a grocer stocking shelves could use an instrumented glove that monitors sights, smells, texture and temperature to flag bad or contaminated produce. Making sense of real-time input flowing at an ever-dizzying rate would be a Herculean task for today’s computers, but would be natural for a brain-inspired system.  

“Imagine traffic lights that can integrate sights, sounds and smells and flag unsafe intersections before disaster happens or imagine cognitive co-processors that turn servers, laptops, tablets, and phones into machines that can interact better with their environments,” said Dr. Modha.

For Phase 2 of SyNAPSE, IBM has assembled a world-class multi-dimensional team of researchers and collaborators to achieve these ambitious goals. The team includes Columbia University; Cornell University; University of California, Merced; and University of Wisconsin, Madison.

IBM has a rich history in the area of artificial intelligence research going all the way back to 1956 when IBM performed the world's first large-scale (512 neuron) cortical simulation. Most recently, IBM Research scientists created Watson, an analytical computing system that specializes in understanding natural human language and provides specific answers to complex questions at rapid speeds. Watson represents a tremendous breakthrough in computers understanding natural language, “real language” that is not specially designed or encoded just for computers, but language that humans use to naturally capture and communicate knowledge.

IBM’s cognitive computing chips were built at its highly advanced chip-making facility in Fishkill, N.Y. and are currently being tested at its research labs in Yorktown Heights, N.Y. and San Jose, Calif.

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Visions of the Future: The Intelligence Revolution - documentary

Visions of the Future: The Intelligence Revolution. 1st part of 3 part miniseries on the BBC hosted by Michio Kaku. In this new three-part series, leading theoretical physicist and futurist Dr Michio Kaku explores the cutting edge science of today, tomorrow, and beyond. He argues that humankind is at a turning point in history. In this century, we are going to make the historic transition from the 'Age of Discovery' to the 'Age of Mastery', a period in which we will move from being passive observers of nature to its active choreographers. This will give us not only unparalleled possibilities but also great responsibilities.
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